1)

The output  F of the logic  circuit given below

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A) $X+\overline{Y}.Z$

B) (Y+Z).X

C) $(\overline{Y}+Z)+X$

D) $X+\overline{Y}+Z$

Answer:

Option A

Explanation:

 

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 Let.s  name intermediate  states as a and b as shown in figure.

 Now,       $a= \overline{Y}$

 $b=Za=z\overline{y}$

 $F= b+ X= Z\overline{Y}+X$