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The output F of the logic circuit given below

$X+\overline{Y}.Z$

B) (Y+Z).X

$(\overline{Y}+Z)+X$

$X+\overline{Y}+Z$

Option A

Let.s name intermediate states as a and b as shown in figure.

Now, $a= \overline{Y}$

$b=Za=z\overline{y}$

$F= b+ X= Z\overline{Y}+X$

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